Helluva Ride (and it’s not over yet)

To carry on my journey from last time …. I figured out from the Slinky ROM listing, that the diags are expecting to read the values back from the registers used to setup the SRAM addresss. My code to that point was only setup for write access only. So I started to modifiy the code to be able to present this info back to the Apple //c bus. What was odd and continued to drive me nuts over the course of a few weeks was that while the code seemed to work in the simulator and combintorial outputs worked on the real hardware, I could not get the ‘reg’ outputs to drive the sram address lines.

It was getting to the point where I was doubting I had even a basic understanding of what the hell I was doing :) 

I tapped Andre’ LaMothe and Alex Freed for advice but it just would not work. I eventually replaced the CPLD with another one and then it started seeing some signs of life …. after some more experimentation and a few more notes back an forth I have gotten it to work with full read/write of the registers and post increment on the data read/write port. Diags will run but bomb out intermittantly at randow addresses where a 00 is written during one of the tests and a FF is read back. That’s the next thing to track down.

The odd thing is that I can put the the original CPLD back in the circuit and it functions okay… so I am really not sure where I went wrong but it sure gave me an oppertunity to wrack my brain. The logic analyzer was invaluable …. worth every penny.

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