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Archive for the 'Apple II Hardware' Category

Apr 19th Update

Sunday, April 19th, 2009
  • :( – not started yet //cmxp going to start looking at 65SPI and SDCard circuit next
  • Started working on this a week or so ago

  • To start with I repurposed a 4×6 perf board that already had a XC9572XL on it that I did my original devsel testing on. That’s it’s main function along with inverting the apple2 read/write signal for the sn74LVCCC4245A OCTAL DUAL-SUPPLY BUS TRANSCEIVER
  • The SPI logic is a copy of the code from Daryl Rictors 65SPI project. My thanks go out to Daryl for sharing this code with the community and patiently answering all my questions about it.
  • The code is running in a EZ-DIGITAL XC95144XL-TQ100 breakout board I purchased from Justin.
  • Murphys law came into effect when I inadvertently set an inversion flag on one of the Logic Analyzer probes which was attached to the MISO line. This stumped me for awhile.
  • Next up is to write some software to make a loadable disk driver for ProDOS so I can test things out in general. I want to see if the SPI controller runs into the same glitch on the IIc+ as my sram interface did.
  • Currently wired is a standard SDCard conenctor. I also have a MicroSD card connector wired up for the second SPI device. The third SPI device will be a wifi-card it is surface mountable so I need to make a mini break out for it.
  • The compact flash interface is mounted but needs to be wire wrapped to the remaining available pins on the CPLD.

Posting from OneNote

Sunday, February 15th, 2009

This is a test blog post from OneNote – been organizing my ideas and projects in it. It’s a pretty cool application.

Uthernet Status

    • Base Cards are out in manufacturing
    • Modules are delayed from Invector- no ETA at this point.

Been busy doing a few things in the background …

    • No progress on the CP2200 driver
    • Ordered 2 Applicard remakes from Alex Freed
    • Reorganizing my basement work area
      • Reorganized my desk space and filing areas
      • Put most loose stuff in see through plastic containers
      • Reviewed document Filing system
      • Documenting A2 Card collection
      • Documenting Embedded hardware kits
    • Deciding which SRAM chip to use
      • CYC1049
      • CY62148
      • CY62158 ( I think this is it) 1M x 8
    • Choices for a larger SRAM are
      • CY62167DV30 (2MB)
      • CY62177DV30 (4MB)
      • MT45W8MW16BGXMT (16MB)
    • Reviewing how to add battery backup to the SRAM circuit
    • Spent some cycles on possible breakout boards to ease further developments
      • Apple 2 Multi-bus breakout board (Applelogic.org org Apple II bus FPGA card got me thinking about this one)
        • Similar concept to 8 bit baby but with only Apple Bus connectors on it
          • 50 contact Apple II slot
          • 60 contact Apple II AUX slot
          • 44 contact IIgs Memory slot
          • 34 pin //c memory expansion connector
        • Center area would have room for a Large CPLD XC95144/288XL – probably be a TQ144 to PGA adapter
        • Connectors for daughter piggy back card to hold the downstream circuit. They would have the other mating side of the board connectors on the main board.
        • All signals are routed from the edge connector to closest board connector. They are also routed (san any power lines) to the closet usable pins on the cpld. Pins from the other side of the cpld are routed toit’s closest board connecter. These signals have possibly had logic applied to them and are for use by the down stream circuit. Since only one bus can be active at a time, having the other busses connect should not affect the downstream circuit.
      • Apple 2 EEPROM support on a 32 DIP DIP.
        • I took Rich Dreyer’s EEPROM circuit from the CFFA card and designed a PCB that mounts the required chips on a 32 pin DIP format to be used with a breadboard like the Littleproto II
        • This would make it easy to add EPROM support to cards under development.
      • Been refining a PSRAM breakout board for this chip MT45W8MW16BGX
      • Working with a few others on a Apple 2 SDRAM interface

  • Next on the Agenda
    • //cmxp going to start looking at 65SPI and SDCard circuit next

Timing

Monday, December 8th, 2008

Timing is something that has been frustrating me a lot lately … first with the //cmxp project and now this potential Ethernet card.

The short of it is, I can’t seem to come to grips with the necessary delay required at machine lanuage speeds. Any other method of doing things slowly seems to work and that includes entering the right values in the monitor or single stepping stepping via NoIce. In fact i have written the init program in basic (some peeks and pokes) and even that works fine … grrrr

In trying to port the driver from c over to assembly I’ve come to realize once again how rusty my assembly skills are. So I am doing a combo c/asm dirver just to verify the hardware functionality.

Going to have to shelve things for a bit, probably till after the holidays – too much stuff going on in other areas. If I mange to sneak any time in i’ll post an update ..

Later

Quick update

Thursday, November 20th, 2008

All my Uthernet back orders except for one have shipped (Sean I am sorry – we’ll talk) and I am stockless once again. The issue this time is the base cards. I have 12 modules on hand and 50 more on order. I want to make a minor update to carrier and will be submitting an order for more PCB’s real soon now.

On the Ethernet next generation front … I plugged in a new prototype tonight I built a while back. It is based on Silabs CP2200 chip. Some benefits to this chip are that it’s about 30% cheaper then the cs8900a, it has a lot less pins and it’s easier to solder. On the software side not sure from a driver perspective if it will be better or not from a space or performance point of view. For this particular prototype I have chosen to use the non multiplex address method which means most of the registers are directly mapped to the Apples memory in the slot i/o area .. ie c400.c4FF .. The first signs of life are that i can read a few registers and they have the correct power on defaults (although some don’t) and i can change a registers contents and it stays and can be changed back. More info to follow.

Nextgen
Bye

Dropping the ball

Thursday, November 6th, 2008

That usually happens with me over the summer .. not much gets done in the hobby space as we are outside enjoying the sunshine … or trying to  … it was quite the rainy summer up in TO this summer.

Uthernet update – I have just received another shipment of modules, so some back orders are going out.   I have been advised that the module I use is being discontinued.  In the short term I plan to stock upon another 50 modules. That should hopefully see me through a decision on what to do next.

The options are

  1. Make my own version of the module
  2. Redesign the card as an all in one (perhaps add some ROM to it)
  3. Replace it with a completely new design (Silabs CP2200 perhaps)

If you have any input I’d like to hear it

Stay tuned …

//cmxp update– When the ball went bouncing down the road back in May, I was stuck on a glitch that still has me scratching my head …. This appears to be random but perhaps my analyser sample isn’t large enough for me to see the big picture.  Something is causing the data-bus to load up with all FF’s prior to it settling down on the vaule i actually want to write and that somehow triggers the address counter to increment prematurely. I have been staring at timing diagrams trying to make sense of it.

Today I recalled that memory cards built for the original //c could not be used in the IIc+ due to a timing problem. I had originally decided to test on the IIc+ so that once i had things down, I figured it should be backward compatible with the original memory expandable //c. On a hunch or perhaps an act of desperation I decided to un-mothball a //c and plugged my memory card into it.  I fired up the diags ($C40AG) and crossed my fingers .. the line of dots kept going and going and going … it made one complete pass .. I let go of my breath then .. I think I was blue  … I kept watching and it didn’t fail … after 10 passes I knew I was out of the woods … so far it has made a total of about 250 passes and no failures yet .. whoopee

Clearly I now have to figure out whats different with the IIc+ from a timing perspective as far as this glitch goes .. at least I know what I have works so far and that’s a step in the right direction. Bring on winter … it’s back to Apple ][ land.

Cheers

Helluva Ride (and it’s not over yet)

Friday, May 30th, 2008

To carry on my journey from last time …. I figured out from the Slinky ROM listing, that the diags are expecting to read the values back from the registers used to setup the SRAM addresss. My code to that point was only setup for write access only. So I started to modifiy the code to be able to present this info back to the Apple //c bus. What was odd and continued to drive me nuts over the course of a few weeks was that while the code seemed to work in the simulator and combintorial outputs worked on the real hardware, I could not get the ‘reg’ outputs to drive the sram address lines.

It was getting to the point where I was doubting I had even a basic understanding of what the hell I was doing :) 

I tapped Andre’ LaMothe and Alex Freed for advice but it just would not work. I eventually replaced the CPLD with another one and then it started seeing some signs of life …. after some more experimentation and a few more notes back an forth I have gotten it to work with full read/write of the registers and post increment on the data read/write port. Diags will run but bomb out intermittantly at randow addresses where a 00 is written during one of the tests and a FF is read back. That’s the next thing to track down.

The odd thing is that I can put the the original CPLD back in the circuit and it functions okay… so I am really not sure where I went wrong but it sure gave me an oppertunity to wrack my brain. The logic analyzer was invaluable …. worth every penny.

Smoke Test …

Tuesday, May 6th, 2008

Well…. the smoke test failed …. I could smell burning somethng ….. turns out I made a  very big mistake … when looking at the memory expansion connector in the IIc memory technical reference and the IIc technical reference, I thought the pinout was as if you were looking down on the the connector in the machine … what they are actually showing is the memory connector on the card facing up … needless to say I had every thing ass backwards … rather then go an rip every thing apart I have used some lead cables and a IDC 34 connector to fix things up for now …

So once I got the system booting again, I was able to successfully program the XC95108 with the jed file I programmed. Next I tried executing the diag code for the memory card @ c40a … it failed with an address error … so thats where I will start my investigations .. I will put the logic analyzer on the Apple side to start to make sure the CPLD is getting all the signals properly … then once I have determined that I will put the probes on the sram side to make sure the ram is reacting properly.

Uthernet cards sold out Again!!

Friday, April 11th, 2008

Wow, they went fast … I have already ordered 25 more modules and PCB’s – realisticaly it will take about 1 month before I am ready to sell again … so send me a email if you want to get on the notification list.

Uthernet cards available for sale again

Wednesday, April 9th, 2008

I have 3 prepaid orders to fill and then a supply of 28 cards available for sale. Anyone on my interrested parties list should have gotten a note from me.

Also I am half finished wiring up the 5v SRAM interface for the IIc. Hope to try that out in a few days.

Sram

If anyone knows of a PCB assembly house that will do microBGA or CP scale packages for a reasonable price then please drop me a line.

Wifi Update

Wednesday, March 12th, 2008

If you have been following along with my plans, you know that the IIcmxp consists of a 1MB  SRAM memory upgrade, SDcard storage and a communications module (I’d like to support both a wired and/or wireless option).  It’s hard to keep on track with a method for tackling this project as I find my self swinging from just working on one aspect of the project to trying of accommodate any of the 3 aspects .ie how they will coexist with one another. I think I have come to the conclusion to develop 3 separate projects and then figure out how to adapt them to live nicely together after the fact.
Which leads me to my next topic … as I stated before I think I have the SRAM down .. still needs to be tested as I have not wired up my original IIcmxp protoboard although i did make up a wiring map for it.  The SDcard is on the back burner at the moment .. still not sure if I want to use a co-processor (like Alex used)  or do it entirely in the CPLD .. which brings me to my 3rd aspect … communications options …

While I am still considering the option to use the approach like the SPI2CF project (again requiring that co-processor like Till used) … I also remembered that I bought the AirDrop-P from  Fred Eady. I never did get that going after buying it … so I brought it out of moth balls, dug up the latest code from the Yahoo group and got it working with my 802.11 infra in the basement including 128 bit wep.  Of course all the hard work was done for me but it took some tweaking to get things complied and runnings smoothly.

With that working I thought it would be a fun challenge to get the IIc to talk directly to the CF card for the purposes of i/o. While the A2 platform already has CF support from other vendors, these are (from what I know) all used in true -IDE mode and do not support cfio operations. I worked on some ABEL code that should let me talk to the cfio registers.

So how to test this ….. hmmm … I decided to take my IIc break out board that I used for /devsel testing and I added a few components to it … namely a CF socket and one of Justins XC95144XL CPLDs .. I decided to keep the XC9572XL already in use (wired) for /devsel, I will use the rest of the i/o in that cpld to do level trasnlation from 5v to 3.3v on any required remaining signals from the IIc (except D0..D7).  The XC95144Xl will be used for the CFCard logic and SDCard logic when I get there.

CFio

and this of course needs to be wire wrapped .. my next work item then is a wiring map for the CF interface .. once thats done then I will start porting some of Fred’s routines via cc65 and we will see where she goes from there …