If you have been following along with my plans, you know that the IIcmxp consists of a 1MB  SRAM memory upgrade, SDcard storage and a communications module (I’d like to support both a wired and/or wireless option).  It’s hard to keep on track with a method for tackling this project as I find my self swinging from just working on one aspect of the project to trying of accommodate any of the 3 aspects .ie how they will coexist with one another. I think I have come to the conclusion to develop 3 separate projects and then figure out how to adapt them to live nicely together after the fact.
Which leads me to my next topic … as I stated before I think I have the SRAM down .. still needs to be tested as I have not wired up my original IIcmxp protoboard although i did make up a wiring map for it.  The SDcard is on the back burner at the moment .. still not sure if I want to use a co-processor (like Alex used)  or do it entirely in the CPLD .. which brings me to my 3rd aspect … communications options …

While I am still considering the option to use the approach like the SPI2CF project (again requiring that co-processor like Till used) … I also remembered that I bought the AirDrop-P from  Fred Eady. I never did get that going after buying it … so I brought it out of moth balls, dug up the latest code from the Yahoo group and got it working with my 802.11 infra in the basement including 128 bit wep.  Of course all the hard work was done for me but it took some tweaking to get things complied and runnings smoothly.

With that working I thought it would be a fun challenge to get the IIc to talk directly to the CF card for the purposes of i/o. While the A2 platform already has CF support from other vendors, these are (from what I know) all used in true -IDE mode and do not support cfio operations. I worked on some ABEL code that should let me talk to the cfio registers.

So how to test this ….. hmmm … I decided to take my IIc break out board that I used for /devsel testing and I added a few components to it … namely a CF socket and one of Justins XC95144XL CPLDs .. I decided to keep the XC9572XL already in use (wired) for /devsel, I will use the rest of the i/o in that cpld to do level trasnlation from 5v to 3.3v on any required remaining signals from the IIc (except D0..D7).  The XC95144Xl will be used for the CFCard logic and SDCard logic when I get there.

and this of course needs to be wire wrapped .. my next work item then is a wiring map for the CF interface .. once thats done then I will start porting some of Fred’s routines via cc65 and we will see where she goes from there …

Not much happened with the project over the Christmas holidays .. we had a sad event in our house … my Mother-inlaw passed away on Christmas Day … she wasn’t your stereo-typical Mother InLaw thats for sure. We are going to miss her greatly but now she is with those who have gone before  …

Plans now are to split the efforts on two fronts …

 a) wire up the original SRAM portion of the IIcmxp prototype. This is all 5-volt stuff – just to prove that it works – I am pretty confident it will. I plan to possibly detach the AVR/CPLD/CF portion and glue that onto the development board pictured before.

b) carrry on with the development board and decide/work out how I will do the SDCard interface. ie with or without a CPU helper. I have been reviewing Alex Freed’s AVR, Verilog and 6502 code from the  Pseudo Disk  project to see how it ticks and to determine if I can re-use any of it for this project ( the ProDOS block driver portion that is not the 140K disk image part) . The alternative is to add a SPI Master port in the CPLD and interface that directly to the 6502  .. the kicker here is that there are only 4 i/o addresses available in the memory interface  A0 & A1 (to keep it compatible with the original memoruy expandable IIc. The IIc+ added A2 and A3)

I want the i/o interface to be as transparent as possible so that the RAM interface works with all previous software that used it. I need to determine how to piggyback the flash (SDCard Interface over top of that) I have some ideas which I have been kicking around for a while. I will document those in my next post. I would certainly welcome any feedback on that info when posted.

 Over and out

 Glenn

Since the Apple IIc memory expansion port was not blessed with a /devsel signal, one must create ones own from address lines A4..A15 (inverted where required) and ph(zero). Pretty simple to do with a PAL or CPLD.

For testing purposes, I have added a flip-flop to the ouput of the equation so I could see this in action. The net result is that the LED toggles on or off every time a memory address is read/written to $c0c0-c0c3.

Making this little side board has been interesting and could come in handy for protoyping new ideas.

I did run into difficulties with one of the cables I made … it must have an intermittant short .. it worked for a while then started giving me grief….

Before starting to wire up the IIcmxp I have been doing a lot of thinking about various aspects of  the project. Should I be doing 5v or 3.3v design … could I somehow use make use of other types of ram or fixed storage ….

I decided to back track a bit and began building a simple offboard expansion card. A six inch ribbon cable joins 2 IDC 34 pin connectors that attach to a 90deg IDC conenctor on some perf board and the IIc+ memory exansion connector.

 I mounted a 44in PLCC socket, a six pin header for JTAG access to the CPLD, a 5v to 3.3v DC-DC voltage regulator a button, a led and a occillator. I use wire wrap to join stuff together. For this experiment the IIc+ just provides power.

Loading up the sample state machine app that comes with the XC2-XL digilent board  functions as expected. Pressing the button cycles the leds in different patterns.

Next I plan to wire up the address bus and data bus so I can experiment with the creation of the /devsel and watch whats going on with the Logic analyzer.

I have done a simple simulation of the Sram interface and it seems to be functioning correctly. I need to start wiring things up  …. I allow myself to be come sidetracked with the next phase,  which will be to add the mmc/SDCard portion of the design ….

I am back working on the //cmxp again.

I have been using Andre’ LaMothe’s Hydra 512K sram adapter a guideline for the //cmxp sram portion of the design. The ABEL code is done. It needs to be simulated still.

While I am working on setting that up, I have also done a wiring list for the wire wrapping I am going to be doing shortly.  At this point I have 112 connections to make.

:o)

As I mentioned in a previous post my //c memory expansion plus card will be for memory expandable //c and above. Similar to the 1Mb memory expansion card for the //c from Apple but will include a SDCard interface and hopefully Wifi. My first phase of the project is to work on the IIc bus interface glue …. I am using a Xilinx XC9500-108-84PLCC

 Here is a link to the prototype board … no wiring has been started yet

http://a2retrosystems.com/images/IIcmxp